Thin Film Deposition for ULSI Devices
In the late 1990's, Cu began to replace Al as the interconnect material for wiring of ULSI devices. Cu may undergo rapid diffusion into the active transistor region, and since Cu is a deep level defect in Si, this degrades transistor performance. To avoid this problem, thin (on the order of 2-10 nm) Ta/TaN diffusion barriers were placed between the Si transistor and Cu interconnect wiring in ULSI devices. Alternative diffusion barrier materials to Ta/TaN are also under investigation. The difficulty in etching Cu resulted in development of damascence and dual damascene processes for Cu interconnect fabrication, as illustrated in the figure below, which contains both horizontal wiring (interconnects) and vertical wiring (vias).
Illustration of dual damascene formation of Cu interconnect wiring.
For the reasons above, electrochemical deposition of both diffusion barrier materials and Cu interconnects are of technological interest. For example, Cu electrodeposition has been the standard technique to fabricate Cu interconnect wiring from the late 1990's until the early 2010's. Here are some publications from our research group on electrochemical deposition of Cu interconnect and diffusion barrier materials for ULSI processing: